Differential amplifier having balanced current flow

ABSTRACT

A two-stage differential amplifier wherein the supply of voltage and current to a first stage differential amplifier circuit is controlled and a direct current from the output side of a second stage differential amplifier circuit is fed back to said first stage circuit.

United States Patent 1 1 3,721,914 Nakamura 5]March 20, 1973DIFFERENTIAL AMPLIFIER HAVING BALANCED CURRENT FLOW [56] ReferencesCited [75] Inventor: l-lajime Nakamura, Kita Nishiogi, UNITED STATESPATENTS Suginami-ku, Tokyo, Japan 3,493,879 2/1970 Stanley ..330/30 D X[73] Asslgnee: Sansun Electric Co., Ltd., Tokyo, 3,077,566 2/1963Vosteen ..330/3O D UX Japan 3,506,926 4/1970 Shoemaker ..330/30 D [22]Filed: March 1971 Primary Examiner-Roy Lake [21] Appl. N0.: 128,083Assistant Examiner-James B. Mullins Attorney-Flynn & Frishauf [30]Foreign Application Priority Data [57] ABSTRACT March 27, 1970 Japan..45/2546l A two stage differential amplifier wherein the pp y ofvoltage and current to a first stage differential am- [52] 330/ plifiercircuit is controlled and a direct current from the output side of asecond stage differential amplifier [51} Int. Cl ..H03f 3/18, H03f 3/68circuit is fed back to Said first Stage circuit [58] Field of Search..330/30 D, 30 R, 13, 17, 25,

330/28 2 Claims, 3 Drawing Figures PATENTEUmzoms 1, 14

SHEET 10F 2 FIG. 1

OUTPUT PATENTEOMAR20I975 FIG. 2

RANGE OF PRACT l CAL APPL I CAT ION (VOLTS) VOLTAGE DIFFERENTIALAMPLIFIER HAVING BALANCED CURRENT FLOW BACKGROUND OF THE INVENTION Thisinvention relates to a transistorized two-stage 5 direct coupled typedifferential amplifier.

With a differential amplifier circuit, it is generally required that theproperties of a pair of transistors acting as a differential amplifier,for example, the degree 10 h of amplifying direct current and thebase-emitter voltage V,,,; be matched within a certain range. The reasonis that if such properties are not well matched, then the bias currentsof the respective transistors will be thrown out of balance to prevent adifferential amplifier circuit consisting thereof from being properlyoperated. Where, therefore, there is manufactured a differentialamplifier, it is necessary to pick out from among a large number oftransistors a pair in which the aforementioned properties closelyapproximate each other. This limits the amount of production andundesirably results in increased cost, presenting a problem particularlyin quantity manufacture.

SUMMARY OF THE INVENTION It is accordingly the object of this inventionto provide a two-stage direct coupled type differential amplifiercapable of acting as a differential amplifier by simple adjustment evenif there are used a pair of transistors having different properties.

A two-stage direct coupling type differential amplifier according tothis invention can attain the aforementioned object by means forcontrolling the voltage and current supplied to a first stagedifferential amplifier and additional D.C. feedback means for feedingback an output from a second stage differential amplifier to the inputside of the first stage differential amplifier.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram of adifferential amplifier according to an embodiment of this invention;

FIG. 2 graphically presents the measured values of current passingthrough part of the circuit of FIG. 1; and

FIG. 3 is a circuit diagram of a differential amplifier according toanother embodiment of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 relates to the casewhere there is applied the differential amplifier of this invention in aquasi complementary symmetry type power amplifier. Reference characters0 and Q, represent PNP type transistors constituting a first stagedifferential amplifier circuit and Q and Q NPN type transistorsconstituting a second stage differential circuit. T and T,, are inputterminals impressed with audio frequency signals and T and T denoteoutput terminals. Of these terminals, T and T are grounded. T and T arepower source terminals. Across T and T as well as across T and T aresupplied direct currents having the same absolute value but oppositepolarities The input terminal T is connected to the base of thetransistor 0 through an input coupling capacitor C, and bleeder resistorR said base being grounded through a bleeder resistor R, The emitters ofthe transistors Q and Q, are jointly other power source terminal Tthrough resistors R and R respectively. The base of the transistor O isgrounded through a resistor 23 and capacitor C The base of thetransistor O is directly connected to the collector of the transistor Qand the base of the transistor Q, is directly connected to the collectorof the transistor 0,. The emitters of the transistors Q and 0 arejointly connected to one end of a resistor R through resistors R and Rrespectively, the other end of said resistor R being connected to thepower source terminal T The collector of the transistor O is groundedand the collector of the transistor 0 is connected to a PNP typetransistor 0 through a protection resistor R and also to the base of theNPN type transistor Q through silicon diodes D D D and D intended forboth supply of bias voltage and temperature compensation as well asthrough a protection resistor R The transistors Q and Q constitute acomplementary symmetry type phase splitter circuit. The contact (i.e.,connection point) of a resistor R and diode D is connected to the powersource terminal T through resistors R and R the contact of which in turnis connected to the collector of the transistor 0, through a capacitor Cintended for prevention of abnormal oscillations. The collector of thetransistor 0 is connected to the power source terminal T and the emitterthereof is connected to the output terminal T through a resistor R andalso directly connected to the base of a PNP type power transistor 0whose collector is connected to the power source terminal T, and whoseemitter is connected to the output terminal T through a resistor R Theemitter of the transistor 0., is connected to the output terminal Tthrough a resistor l9 and the collector thereof is connected to theother power source terminal T through a resistor R and also directlyconnected to the base of an NPN power transistor Q whose collector isdirectly connected to the output terminal T and whose emitter isconnected to the other power source terminal T through a resistor R Theoutput terminal T,, is connected to the base of the transistor Q,through a resistor R which constitutes a D.C. feedback circuit. Acircuit consisting of the resistors R and R and capacitor C constitutesa negative feedback circuit with respect to A.C. signals.

There will now be described the operation of a power amplifier arrangedas described above. The description first relates to the operation of atwo-stage direct coupled type amplifier by reference to FIGS. 1 and 2.With the voltage across the terminals J and G of the variable resistorVR designated as E, and the voltage across the terminals P and G thereofas IE let it be assumed that there flow currents I 1,, I and I, throughthe resistors R-,, R R, and R respectively.

When the movable terminal P of the variable resistor VR is so set as tohave its voltage E, reduced to 0 volt (E, 0), the transistors 0 and Q,are in an off state because their emitter and base voltages are zero.Accordingly, the transistors Q and Q, are also in an off state, that is,all currents I,, I and I, are zero. Therefore, the transistors Q Q Q andQ are also in an inoperative state, permitting no passage of currentthrough the resistor R When the movable terminal P of the variableresistor VR is so set as to be impressed with progressively increasingvoltage E E,), then there occur different voltages between the base andemitter of the transistor Q, whose base is grounded through the resistorR so that said transistor Q, is rendered conducting. Since the base ofthe transistor O is not directly grounded, its base voltage istemporarily drawn near its emitter voltage, so that said transistor Q iseventually put into operation, though its base-emitter voltage issmaller than that of the transistor 0,. Since, in this case, thetransistor Q, has a higher base-emitter voltage than the transistor 0,,the former has a larger collector current than the latter, that is, I,is greater than I Accordingly, the transistor Q, has a higher basevoltage than the transistor Q and is actuated. At this time, thecollector current of said transistor Q, passes through the resistors R,and R, and diodes D,, D D and D to impress the bases of the transistorsQ and Q, with bias voltage, so that both transistors Q and Q and inconsequence the transistors Q and Q, are energized. To the base of thetransistor Q, is conducted current through the resistor R to increaseits collector current I,. When the collector currents I, and I of thetransistors Q, and Q, are made equal, then the collector currents I andI, of the transistors Q and Q, also become equal.

When the voltage at point P is raised, there flows larger currentthrough the resistor R to balance the magnitudes of current passingthrough the transistors Q Q Q and Q resulting in further increase in thecollector current I, of the transistor 0, and in consequence the emittercurrent I, of the transistor 0,.

FIG. 2 graphically presents measured values associated with theaforementioned cycle of operation. In said measurement, the variableresistor VR consisted of a 3 K0 type to adjust the emitter voltages ofthe transistors Q, and Q, and another circuit element consisted of anamplifier of substantially the same type as a common combination oftwo-stage differential amplifier and quasi complementary symmetry typepower amplifier, so that detailed description of the constant of saidcircuit elements is omitted. Referring to FIG. 2, the abscissarepresents voltage E, across the terminals P and G, and the ordinate themagnitutes of current passing through the individual branched circuits.As apparent from FIG. 2, when the voltage E, acrossthe terminals P and Gtakes a certain value, the collector currents I, and I, of thetransistors Q, and Q, constituting the first stage differentialamplifier circuit are made equal. At this time, the emitter currents I,and I, of the transistors Q, and Q, constituting the second stagedifferential amplifier circuit are also made equal. Accordingly, thefirst and second stage differential circuits fully display a function assuch. It will be apparent that even when the currents I, and I,, as wellas those I, and

I do not exactly agree with each other, the aforesaid differentialamplifier circuit well serves the practical purpose even in a region ofunbalance indicated in dotted lines in FIG. 2.

There will now be further described the operation of a power amplifierused in the circuit of FIG. 1, particularly with respect to A.C. inputsignals. Now let it be assumed that both differential amplifiers are ina balanced condition due to the aforesaid adjustment and that theresistors R and R are so controlled as to cause the voltage across theoutput terminals T and T to be reduced to zero when the input signal iszero. The A.C. signal supplied across the input terminals T and T isamplified by the transistor Q, to be drawn out from its collector asoutput having an opposite phase to said input signal. Since the base ofthe transistor Q, is grounded with respect to A.C. signal through theresistor R and capacitor C,,, the input signal is supplied to theemitter of the transistor Q through the resistors R and R, to be drawnout from its collector in the form of a minor signal having the samephase as the input signal supplied to the transistor 0,. Namely, thecollector output of the transistor Q, and that of the transistor Q haveopposite phases. The signal conducted from the collector of thetransistor Q, is amplified by the transistor Q, to be drawn out from thecollector of the latter transistor 0,. The signal supplied from thecollector of the transistor Q, is drawn out from the collector of thetransistor Q The positive half cycle of the output from the collector ofthe transistor Q, is amplified by the transistor 0,, and the negativehalf cycle of said output is amplified by the transistor 0,. Theseoutputs are further amplified by the transistors Q and 0,, respectively,so that there is produced across the output terminals T and T an outputhaving the same phase as the input signal. Part of the output generatedat the output terminal T is fed back to the base of the transistor Qthrough the resistor R in the negative form because said output has anopposite phase to the collector output of a transistor 0,. That is, theresistor R acts as an A.C., as well as a D.C., feed back circuit.

The foregoing description relates to the case where the two-stagedifferential amplifier of this invention was used in a quasicomplementary symmetry type power amplifier. It will be apparent thatthe invention is also applicable in any other type of power amplifier.Such application, for example, is illustrated in FIG. 3 wherein thedifferential amplifier circuit is employed in the known Darlington typepower amplifier. The same parts of FIG. 3 as those of FIG. 1 are denotedby the same numerals. The operation of said Darlington type poweramplifier is already well known and the operation of the two-stagedifferential amplifier circuit of this invention shown in FIG. 3 is thesame as that of FIG. 1 and description thereof is omitted. The onlydifference between the embodiment of FIG. 3 and that of FIG. 1 is thatthe former has a Zener diode disposed between the fixed terminals of thevariable resistor VR. Said Zener diode is intended to stabilize theemitter voltages of the first and second transistors Q, and Q,. Theresistor R constituting a DC. feedback circuit is connected to thecollector of a transistor Q, from which there is drawn out the output ofthe power amplifier, as well as to the base of the second transistor 0,.

In this specification there is described a two-stage differentialamplifier circuit using NPN or PNP type transistors as described above.It will be apparent that this invention is also applicable to two-stagedifferential amplifier circuits using an active semiconductor elementsuch as a field effect transistor.

What I claim is: and fourth transistors; and l. A two-stage directcoupled type differential amplimeans for substantially balancing thecurrent flow of fier comprising: tee first and the second transistors,and of the third a first stage differential amplifier circuit includingand the fourth transistors, said balancing means first and secondtransistors connected in a dif- 5 comprising: ferential circuitconfiguration, each of said first a DC. feedback circuit connectedbetween the and second transistors having base, emitter, and collectorelectrode of said fourth transistor and collector electrodes; the baseelectrode of said second transistor; and

asecond stage differential amplifier circuit including emitter biasvoltage eg g eans including a third and fourth transistors co d i a dif.l0 bleeder-type variable resistance element having a ferential circuitconfi ur ti h f id hi d pair of fixed resistance terminals and avariable reand fourth tran i tor h i b i and sistance tap intermediatesaid fixed terminals, one collector electrodes, the base electrode ofsaid of said fixed resistance terminals being coupled to thirdtransistor being directly connected to the colsaid first Power PP)terminal, the other of Said lector electrode of said second transistor,and the fixed resistance terminals being coupled to a b electrode f id fth transistor being source of potential and said variable resistance tapdirectly connected to the collector electrode of being coupled to theemitter electrodes of first id fi transistor; and second transistors;and a Zener diode conan input terminal connected to the base electrodeof "acted between Said P of fixed resistance id fi t transistor; minalsof said variable resistance element for regua fi t power supply terminalconnected to the lating the common emitter bias voltage of the firstemitter electrodes of said first and second and Second transistorsi 2.The amplifier according to claim 1 wherein said a Second power Supplyterminal connected to the other fixed resistance terminal of saidvariable resistor collector electrodes of said first and secondiscoupledto groundpotemial' transistors and the emitter electrodes ofsaid third

1. A two-stage direct coupled type differential amplifier comprising: afirst stage differential amplifier circuit including first and secondtransistors connected in a differential circuit configuration, each ofsaid first and second transistors having base, emitter, and collectorelectrodes; a second stage differential amplifier circuit includingthird and fourth transistors connected in a differential circuitconfiguration, each of said third and fourth transistors having base,emitter, and collector electrodes, the base electrode of said thirdtransistor being directly connected to the collector electrode of saidsecond transistor, and the base electrode of said fourth transistorbeing directly connected to the collector electrode of said firsttransistor; an input terminal connected to the base electrode of saidfirst transistor; a first power supply terminal connected to the emitterelectrodes of said first and second transistors; a second power supplyterminal connected to the collector electrodes of said first and secondtransistors and the emitter electrodes of said third and fourthtransistors; and means for substantially balancing the current flow oftee first and the second transistors, and of the third and the fourthtransistors, said balancing means comprising: a D.C. feedback circuitconnected between the collector electrode of said fourth transistor andthe base electrode of said second transistor; and emitter bias voltageregulating means including a bleeder-type variable resistance elementhaving a pair of fixed resistance terminals and a variable resistancetap intermediate said fixed terminals, one of said fixed resistanceterminals being coupled to said first power supply terminal, the otherof said fixed resistance terminals being coupled to a source ofpotential and said variable resistance tap being coupled to the emitterelectrodes of the first and second transistors; and a Zener diodeconnected between said pair of fixed resistance terminals of saidvariable resistance element for regulating the common emitter biasvoltage of the first and second transistors.
 2. The amplifier accordingto claim 1 wherein said other fixed resistance terminal of said variableresistor is coupled to ground potential.
 2. The amplifier according toclaim 1 wherein said other fixed resistance terminal of said variableresistor is coupled to ground potential.